1. Field of the Invention
The present general inventive concept relates to an image forming apparatus and method of translating a virtual memory address into a physical memory address, and more particularly to, an image forming apparatus and method of translating a virtual memory address into a physical memory address to improve a delay caused in a process of translating the virtual memory address into the physical memory address.
2. Description of the Related Art
Image forming apparatuses are apparatuses which print data generated in a terminal, such as a computer, on a recording paper. As an example of the image forming apparatus, there is a copy machine, a printer, a facsimile, or a multi function peripheral (MFP) which includes functions and/or structures of the copy machine, the printer and the facsimile through one apparatus, or the like
In general, since a program having a larger capacity than a capacity or size of a main memory cannot loaded in the memory using only a physical memory address space, it is impossible to execute the program having a large capacity. Since the program is sequentially executed in a processor, it is necessary that only a part of a code of the program required in the processor is present in a limited period of time or a required period of time. In this way, virtual memories have been suggested to overcome the above limitations.
In a conventional system using a virtual address, since the virtual address is different from a physical memory address, data which is in a consecutive data space on the virtual address does not necessarily correspond to a consecutive space of the physical memory address. For example, if a spacer of 10 MB is allocated using a function, such as a malloc function, in the system using the virtual address, the space of 10 MB is consecutively arranged in the virtual address, but the space of 10 MB is consecutively or inconsecutively divided in the physical memory address in the unit of page and dispersedly arranged on the memory.
If data programmed in the address, that is, data disposed in the space of 10 MB of the virtual address is copied to other physical memory space through an intellectual property (IP) core, the hardware IP core does not consecutively process data. If data is copied through direct memory access (DMA), the data can be copied within a consecutive stream of a physical memory address. It is because the data space is consecutive in the virtual address, but the data space is dispersed (or unaligned) in the physical memory address in the unit of page. Specifically, since the physical memory address is used in hardware, such as the IP core, within a system on chip (SoC), when the hardware IP operates, the virtual memory address has to be translated into the physical memory address to be used in a read and write process.
Therefore, when the hardware operates, a physically consecutive space is allocated and data is copied in a corresponding area to drive the hardware or scattering/gathering DMA iteratively performed in the unit of an inconsecutive space which is dispersed in the unit of page.
However, it is ineffective due to a dual copy that the physically consecutive space is allocated and the data is copied into the corresponding area. It may be impossible to ensure the physical consecutive space corresponding to the area according to the situation of a memory manager of an operating system and in this case, it has to wait in a stand-by state until a corresponding resource is ensured.